Synchronizing signal extracting apparatus

ABSTRACT

A synchronizing extracting apparatus is for extracting a synchronizing reference signal suitable for a digital signal processing circuit from an input composite picture signal which includes a ternary synchronizing signal. The negative peak of the input composite picture signal is clamped by a peak calming circuit, and the clamping output is applied to a pulse generating circuit to generate a first pulse having a pulse width extending from the front porch to of the synchronizing signal. The back porch, the input composite picture signal and a signal which is reverse in phase to the input composite picture signal are clamped by a pedestal clamping circuit. The output of the clamping circuit and the first pulse are respectively applied to two differential amplifying circuits. Two pulse signals of a same polarity corresponding to the negative polarity portion and the positive polarity portion of the ternary synchronizing signal of the input composite synchronizing signal are obtained. The synchronizing reference signal is obtained corresponding to the center of the one pair of pulse signals.

BACKGROUND OF THE INVENTION

The present invention relates to a synchronizing signal extractingapparatus for a display device for projecting high quality televisionpictures.

In the conventional NTSC system television signals, the horizontalsynchronizing signal is a negative polarity pulse inserted on the blacklevel side of the picture signal. On the other hand, studio standards ofa high quality television system prescribe that the horizontalsynchronizing signal is take the form of the so-called ternary valuesynchronizing signal which comprises two pulses of a negative andpositive polarity. The present invention relates to a synchronizingsignal detaching apparatus which is capable of correctly reproducing theternary value synchronizing signals.

FIG. 1 is a block diagram of the conventional synchronizing signalextracting apparatus. In FIG. 1, reference denotes 101 a currentamplifying circuit for amplifying composite signals including a ternaryvalue synchronizing signal and a picture signal, 102 denotes a peakclamping circuit for securing the negative peak of the output of thecurrent amplifying circuit 101 to a constant direct current level, and103 denotes a voltage comparing circuit for outputting a prescribedvoltage when the output of the peak clamping circuit 102 is lower than areference value.

By the above-described construction, positive polarity synchronizingsignals are obtained in the output of the voltage comparing circuit 103.FIGS. 2(a)-(d) depict voltage waveforms of each portion of theconventional synchronizing signal extracting apparatus. The operation ofthe conventional synchronizing signal extracting apparatus of FIG. 1will be described below with reference to FIG. 2.

The composite signal a of FIG. 2(a) is amplified in the currentamplifying circuit 101 and is inputted to the peak clamping circuit 102.As the negative peak of the ternary value synchronizing signal isclamped to 0 V, the output of the peak clamping circuit 102 is providedas shown in FIG. 2(b). When the signal "b" is inputted into the voltagecomparing circuit 103, this electric potential of the signal is comparedwith a voltage comparison reference potential for and the comparisonresult is output as shown in FIG. 2(c). As shown in FIG. 2, although thesignal "c " contains the so-called pedestal portion, the level of thepedestal may be made have a potential of zero if the reference potentialof the voltage comparison is adjusted each time, so that the output ofthe voltage comparing circuit 103 includes only the positive polaritypulses as shown in FIG. 2(d). A point at which each output pulse in FIG.2(d) drops to the 0 potential is used as the synchronizing reference ofthe high quality television receiver image receiving device.

In, the synchronizing signal extracting apparatus of the conventionalembodiment, it is necessary to adjust the comparative referencepotential of the voltage comparing circuit to obtain the synchronizingreference of the high quality television image receiving device.Accordingly, if a variation of the reference potential and an outputvariation of the peak clamping circuit are present, the width of theoutput pulse becomes narrower when the waveform of the inputsynchronizing signal losses its sharpness due to the capacitivecomponent of the signal transmission path, with a disadvantage resultingin that the pedestal portion is contained in the output as shown in FIG.2(c) to prevent the synchronizing reference from being reproduced.

SUMMARY OF THE INVENTION

A main object of the present invention is to provide a synchronizingsignal extracting circuit which is capable of correctly reproducing thesynchronizing reference in the ternary value synchronizing signal.

In order to achieve the above-described object, the synchronizing signalextracting apparatus of the present invention includes a circuit forobtaining two composite picture signals having mutually reversed phasesfrom the input composite picture signal, a pedestal clamping circuit forequalling the pedestal level of the two composite picture signals, twodifferential amplifying circuits upon which the two pedestal-clampedsignals are applied, a pulse generating circuit for generating a pulsesignal having a pulse width extending from a front porch to a back porchin accordance with the input composite picture signal, wherein the pulsegenerating circuit outputs are inputted respectively into the otherterminals of the differential amplifying circuit to compose the outputof the differential amplifying circuits so as to obtain thesynchronizing reference.

By the above-described construction, the two pulses of negative andpositive polarity of the ternary value synchronizing signal are obtainedin the output of the differential amplifying circuit as a pair of pulsesof the same polarity, and may be extracted in a form which is easier tohandle as a digital signal from the composite signal. If the center of apair of pulses which are the outputs of the differential amplifyingcircuit is prescribed to be a synchronized reference, the adjustment ofthe comparative reference potential as in the conventional embodimentbecomes unnecessary, so that a superior synchronizing signal extractingapparatus is provided in which the synchronizing reference does not varyeven if the clamp level varies.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram of a synchronizing signal extracting apparatusof the conventional embodiment;

FIGS. 2(a)-(d) depict wave-forms for illustrating the operation of thesynchronizing signal extracting apparatus of the conventionalembodiment;

FIG. 3 is a block diagram of a synchronizing signal extracting apparatusin one embodiment of the present invention;

FIGS. 4(a)-(j) depict wave-forms for illustrating the operation of thesynchronizing signal extracting apparatus shown in FIG. 3; and

FIG. 5 is a circuit diagram of a synchronizing signal extractingapparatus in one embodiment of the present invention.

DESCRIPTION OF THE PREFERRED EMBODIMENT

FIG. 3 is a block diagram of a synchronizing signal extracting apparatusin one embodiment of the present invention, FIGS. 4(a)-(j) depict thevoltage waveforms of each portion in the synchronizing signal extractingapparatus in the one embodiment. The embodiment of the present inventionwill be described hereinafter with reference to the drawings.

In FIG. 3, reference 1 denotes a current amplifying circuit foramplifying the input composite picture signal containing the ternaryvalue synchronizing signal, reference 2 denotes a voltage amplifyingcircuit of gain 1 for reversing the output of the current amplifyingcircuit 1, reference 3 denotes a peak clamping circuit for clamping thenegative peak of the output of the current amplifying circuit 1 to aconstant direct current voltage level.

Also, reference 4 denotes a first pulse generating circuit which istriggered with the negative peak of the output of the peak clampingcircuit 3 to generate a first pulse having a pulse width extending fromthe front porch appearing before, after of the ternary valuesynchronizing signal to the back porch appearing after the ternary valuesynchronizing signal, reference 5 denotes a second pulse generatingcircuit which is triggered with the output of the first pulse generatingcircuit 4 to generate a second pulse of a prescribed pulse width,reference 6 denotes a pedestal clamping circuit which uses the output ofthe second pulse generating circuit 5 as a gate voltage, and whichincludes inputs the output of the current amplifying circuit 1 and theoutput of the voltage amplifying circuit 2 so as to equalize thepedestal potentials. Reference 7 denotes a first differential amplifyingcircuit upon which the first output of the pedestal clamping circuit 6and the first pulse output from the first pulse generating circuit 4 areapplied. Reference 8 denotes a second differential amplifying circuitupon which the second output of the pedestal clamping circuit 6 and thefirst pulse are applied.

The operation of each portion in the apparatus constructed as describedhereinabove will be described with reference to FIG. 3, and FIGS.4(a)-(j)

The input and the output of the current amplifying circuit 1 has avoltage wave-form as shown in FIG. 4(a). The output of the voltageamplifying circuit 2 for reversing the output of the current amplifyingcircuit 1 has a voltage waveform as shown in FIG. 4(b). The output ofthe peak clamping circuit 3 upon which the output "a" of the currentamplifying circuit 1 is amplified becomes a voltage waveform as shown inFIG. 4(c) with the negative peak being maintained at the constantpotential, which is 0 V in the present embodiment.

As shown in FIG. 4(c), the signal portion at T1≦t≦T2 before the ternaryvalue synchronizing signal is referred to as a front porch, the signalportion at T2≦t≦T3 is the polarity pulse of the synchronizing signal,the signal portion at T3≦t≦T4 is the positive polarity pulse of thesynchronizing signal, and the signal portion at T4≦t≦T5 is referred toas a back porch. The signal at T1≦t≦T5 constitutes a pedestal periodwith the ternary value synchronizing signal being piled up with thepedestal level as the reference.

The so-called pedestal clamping effected in the pedestal clampingcircuit 6 is for maintaining a constant potential of the pedestal as inpeak clamping. It is to be noted that there are a back porch clampingsystem and a front porch clamping system as the specific methodsthereof.

The first pulse generating circuit 4 is triggered with the peak clampingoutput shown in FIG. 4(c) to generate the first pulse "d" (FIG. 4(d) ofa negative polarity extending from the back porch, to the front porch.The second pulse generating circuit 5 is triggered by the first pulse"d" to generate a second pulse "e" of a positive polarity having theconstant pulse width as shown in FIG. 4(e). The generating timing of thesecond pulse "e" is a back porch period. Since the pedestal clampingcircuit 6 gates the output "a" of the current amplifying circuit 1 andthe output "b" of the voltage amplifying circuit 2 according to thepulse period of the second pulse (FIG. 2(e) to clamp the back porch tothe 0 potential to effect the outputting operation, the outputs of thepedestal clamping circuit become the first, second outputs f, and ghaving voltage waveforms shown respectively in FIGS. 4(f), 4(g).

A specific circuit diagram of the synchronizing signal extractingapparatus of the present embodiment of FIG. 3 is shown in FIG. 5.

In FIG. 5, reference 1 denotes a current amplifying circuit foramplifying the composite signal containing the ternary synchronizingsignal, reference 11 denotes a transistor for amplifying the current,and reference 12 is denotes a load resistor. Reference 2 denotes avoltage amplifying circuit of gain 1 for reversing the output of thecurrent amplifying circuit 1, reference 21 denotes a second transistor,reference 22 denotes a second resistor which is a load, reference 23denotes a third resistor having a resistance value which is the same asthat of the resistor 22.

Reference 3 denotes a peak clamping circuit for clamping the negativepeak of the output of the current amplifying circuit 1 to 0 V, reference13 denotes a capacitor for removing the direct current of the input,reference 14 denotes a resistor for feeding the current into thecapacitor 13 from the power supply, reference 15 denotes a diode forapplying the charging current to the capacitor 13 and for preventing anelectric charge, reference 16 denotes a second diode connected to thenodes of the resistor 14 and the diode 15 to maintain the anode voltageof the diode 15 constant. Since each cathode voltage is equal if thediode 15 and the diode 16 have the same characteristics, the cathodevoltage of the first diode 15, which is the output voltage of the peakclamping circuit 3, does not become 0 V or less, whereby the negativepeak of the output voltage thus becomes 0 V.

Reference 4 denotes a circuit triggered by the negative peak of theoutput of the peak clamping circuit 3 to generate the first pulse,reference 17 denotes a resistor for restricting the input current,reference 18 denotes a Zener diode which prevents over-input-voltage,reference 19 denotes a multivibrator which generates pulses when theinput voltage becomes a reference voltage or less. Reference 5 denotes asecond pulse generating circuit 5 which is triggered by the output ofthe first pulse generating circuit 4 to generate the second pulse, themultivibrator 20 generates second pulses when the input voltage becomesthe reference voltage or more. Reference 6 denotes a pedestal clampingcircuit which clamps the output of the current amplifying circuit 1 andthe output of the voltage amplifying circuit 2 using the output of thesecond pulse generating circuit 5 as the gate voltage, references 24 and25 denote third and fourth transistors, reference denotes 26 a currentrestricting resistor reference 27 and 28 denote resistors for feedingcurrent to the transistors 24 and 25 from the power supply, references29 and 30 denote capacitors for removing the direct current portion ofthe input voltage. When the second pulse is inputted into the bases ofthe transistors 24 and 25 through the resistor 26 and the transistors24, 25 become conductive, thus grounding and charging, the capacitors 29and 30. Since the pulse is repeatedly input, the electric charge of thecapacitors is not discharged, the result being that two output voltagesare clamped to become 0 V during the pulse period. Since the secondpulse exists during the pedestal period of the signal, the circuit 6 iscalled a pedestal clamping circuit. References 7 and 8 denote two setsof differential amplifying circuits for receiving as inputs the firstpulse and the two outputs of the pedestal clamping circuit 6,.References 31, 32, 33 and 34 denotes transistors for effectingdifferential amplification by a set of two, reference 35 denotes aresistor for restricting the input references 36 and 37 denote resistorsfor dividing the power supply voltage to provide a bias to the bases ofthe transistors 31 and 33, references 38 and 39 denote current feedback,resistors and reference 40 denotes a common load resistor of thetransistors 32 and 34.

As shown in FIG. 5, the first differential amplifying circuit 7 iscomposed of two transistors 31 and 32 and a resistor. The first clampingoutput shown in FIG. 4(f) is applied to the base of the transistor 32,and the first pulse shown in FIG. 4(d) is applied to the base of theother transistor 31. Assuming that the peak value of the pulse "d" issufficiently large, the transistor 32 is cut off when the pulse "d" isat a high potential, and the transistor 31 is conductive. The transistor32 is conductive at a period when the potential of the positive polaritysynchronizing signal exceeds the pulse "d" potential, and the outputcurrent of the differential amplifying circuit 7 is provided as shown inFIG. 4(h). The operation of the differential amplifying circuit 8 issimilar to that of the differential amplifying circuit 7, and the outputcurrent shown in FIG. 4(i) is obtained from the input voltage signals ofthe FIGS. 4d and 4g.

The outputs of two differential amplifying circuits 7 and 8 are commonlyconnected to obtain the sum of the currents shown in FIGS. 4(h) and4(i), whereby so that the output pulse shown in FIG. 4(j) is obtained.The output pulse becomes one continuous pulse if the synchronizingsignal in the input composite signals is a completely rectangular wave.However, if the synchronizing signal has lost its sharpness and isactually closer in form to a sine wave when applied to the currentamplifying circuit 1, a spacing between the pulses h and i becomes canresult. The amount of spacing varies due to the variation in the inputpulse of the differential amplifying circuit and the operation point.However, according to the operation of the above-described apparatus, itis clear that the pulse of the output exhibits a symmetrical waveformwith respect to the center thereof, relative the time axis, so that thetime center does not vary even if the spacing varies. It is possible tofill the spacing by the signal processing to provide one pulse, or it ispossible to generate a pulse only during the period of the spacing. Bythe way, in the synchronizing AFC circuit of present television imagereceiving devices, a balance form of saw tooth wave AFC circuit isadopted, and the synchronizing signal and the comparison signal (sawtooth signal) are compared with in phase to apply the AFC. Thus, asdescribed hereinabove, if the pulse j" of the total of two output pulsesh and i has a symmetrical waveform at the time axis, it may be used asis as the synchronizing signal in the synchronizing circuit.

It is to be noted that, operationally, the two differential amplifyingcircuits are simply gate circuits driven by the first pulse Accordingly,by providing a device in which third transistor is adopted as a constantcurrent supply in the differential amplifying circuit, a compositesignal is inputted into the first transistor, a fixed bias is inputtedinto the second transistor, and a pulse for effecting the drivingoperation for the pulse period only is inputted into the thirdtransistor, the same operation as in one embodiment may be effected.

As described hereinabove, two composite picture signals reverse mutuallyin phase in polarity from the input composite picture signal containingthe ternary synchronizing signal may be obtained, the pedestal level ofthe two composite picture signals is made equal, two signals equal inthese pedestal level are gated by the pulse of the pulse width spreadfrom the front porch to the back porch, the same polarity of pulsecorresponding to the positive polarity, negative polarity synchronizingsignal sound component of the ternary synchronizing signal may beobtained, the synchronizing reference of the ternary synchronizingsignal may be obtained by the composite pulse of these two pulses, sothat the ternary synchronizing signal is changed in a form easy tohandle and may be taken out. As a result, a synchronizing signalextracting apparatus of an extremely superior high-vision televisionsignal which does not go wrong in the information of the synchronizingsignal due to the dispersion of the circuit constant may be provided.

What is claimed is:
 1. A synchronizing signal extracting apparatuscomprising:receiving means for receiving an input composite picturesignal; a peak clamping circuit, operatively coupled to said receivingmeans, for clamping a peak of the input composite picture signal, theinput composite picture signal including a ternary value synchronizingsignal, the ternary value synchronizing signal including a front porchportion, a negative polarity extending portion, a positive polarityextending portion and a back porch portion; a pulse generating circuit,operatively coupled to said peak clamping circuit, for generating afirst pulse signal having a pulse width extending to the back porchportion from the front porch portion of the ternary value synchronizingsignal; a reversing circuit, operatively coupled to said receivingmeans, for reversing the input composite picture signal; a pedestalclamping circuit, operatively coupled to said receiving means and saidreversing circuit, for pedestal-clamping the input composite picturesignal and the reversed input composite picture signal which aremutually reverse in phase; a first differential amplifying circuit,operatively coupled to said pedestal clamping circuit and said pulsegenerating circuit, for generating a second pulse signal correspondingto one of the positive polarity extending portion or the negativepolarity extending portion of the ternary value synchronizing signalbased on the pedestal-clamped input composite picture signal and thefirst pulse signal; a second differential amplifying circuit,operatively coupled to said pedestal clamping circuit and said pulsegenerating circuit, for generating a third pulse signal corresponding tothe other of the positive polarity extending portion or the negativepolarity extending portion of the ternary value synchronizing signalbased on the pedestal-clamped reversed input composite picture signaland the first pulse signal; wherein the second and third pulse signalstogether correspond to an extracted synchronizing signal.
 2. Asynchronizing signal extracting apparatus as recited in claim 1, furthercomprising a second pulse generating circuit, operatively coupled tosaid pulse generating circuit, for generating a fourth pulse signal of aprescribed pulse width during the back porch portion of the ternaryvalue synchronizing signal in accordance with the first pulse signal,wherein the fourth pulse signal is applied to said pedestal clampingcircuit as a gate signal.
 3. A synchronizing signal extracting apparatusas recited in claim 1, wherein the second and third pulse signals are ofa same prescribed polarity.
 4. A synchronizing signal extractingapparatus as recited in claim 2, wherein the second and third pulsesignals are of a same prescribed polarity.
 5. A synchronizing signalextracting apparatus as recited in claim 1, wherein a synchronizingreference of the extracted synchronizing signal corresponds to a centertiming of the second and third pulse signals.
 6. A synchronizing signalextracting apparatus as recited in claim 2, wherein a synchronizingreference of the extracted synchronizing signal corresponds to a centertiming of the second and third pulse signals.
 7. A synchronizing signalextracting apparatus as recited in claim 3, wherein synchronizingreference of the extracted synchronizing signal corresponds to a centertiming of the second and third pulse signals.
 8. A synchronizing signalextracting apparatus as recited in claim 4, wherein a synchronizingreference of the extracted synchronizing signal corresponds to a centertiming of the second and third pulse signals.